The following pages link to MiBench (Q16597):
Displaying 28 items.
- Energy-aware assignment and scheduling for hybrid main memory in embedded systems (Q258542) (← links)
- The QC-2 parallel queue processor architecture (Q436683) (← links)
- An algorithm for finding input-output constrained convex sets in an acyclic digraph (Q450526) (← links)
- Embedded-TM: energy and complexity-effective hardware transactional memory for embedded multicore systems (Q666237) (← links)
- Speculative parallelization of sequential loops on multicores (Q735356) (← links)
- Modulo path history for the reduction of pipeline overheads in path-based neural branch predictors (Q934719) (← links)
- A novel instruction stream buffer for VLIW architectures (Q962617) (← links)
- Code transformations for TLB power reduction (Q987738) (← links)
- Improving adaptability and per-core performance of many-core processors through reconfiguration (Q987754) (← links)
- A profile-based tool for finding pipeline parallelism in sequential programs (Q991154) (← links)
- A compiler-hardware approach to software protection for embedded systems (Q1007293) (← links)
- Algorithms for generating convex sets in acyclic digraphs (Q1044043) (← links)
- Probabilistic analysis of steady-state temperature and maximum frequency of multicore processors considering workload variation (Q1792838) (← links)
- Automatic design of application specific instruction set extensions through dataflow graph exploration (Q1878897) (← links)
- Evaluation and choice of various branch predictors for low-power embedded processor (Q1884334) (← links)
- Non-blocking Patricia tries with replace operations (Q2010602) (← links)
- An exact algorithm for the sequential ordering problem and its application to switching energy minimization in compilers (Q2350866) (← links)
- Using on-chip networks to implement polymorphism in the co-design of object-oriented embedded systems (Q2459373) (← links)
- Finding optimal hardware/software partitions (Q2461561) (← links)
- Using FORAY models to enable MPSoC memory optimizations (Q2481594) (← links)
- The ArchC architecture description language and tools (Q2506243) (← links)
- Hardware/software optimization for array {\&} pointer boundary checking against buffer overflow attacks (Q2507122) (← links)
- Sigma* (Q2931821) (← links)
- AUSPICE-R: Automatic Safety-Property Proofs for Realistic Features in Machine Code (Q3179279) (← links)
- (Q4439592) (← links)
- (Q4813413) (← links)
- Hybrid Heuristics for Optimizing Energy Consumption in Embedded Systems (Q4932753) (← links)
- Evaluating the Kernighan-Lin Heuristic for Hardware/Software Partitioning (Q5308326) (← links)
