Pages that link to "Item:Q1757695"
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The following pages link to A disturbance rejection control approach for clock synchronization in IEEE 1588 networks (Q1757695):
Displaying 4 items.
- Maximum likelihood estimation of clock skew in IEEE 1588 with fractional Gaussian noise (Q1664856) (← links)
- Network topology identification under the multi-agent agreement protocol (Q2047111) (← links)
- Precise clock synchronization in industrial internet of things: networked control perspective (Q3385011) (← links)
- General proportional integral observer (GPIO) -- based disturbance compensation for minimum variance time synchronization (Q6157324) (← links)