Pages that link to "Item:Q2312516"
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The following pages link to ASIC implementation of area-efficient, high-throughput 2-D IIR filter using distributed arithmetic (Q2312516):
Displaying 5 items.
- VLSI array processors' block implementation of IIR digital filters (Q1115837) (← links)
- Design methodology for subdigit pipelined digit-serial IIR filters (Q1274866) (← links)
- Design and implementation of low complexity circularly symmetric 2D FIR filter architectures (Q2211689) (← links)
- Design and implementation of power and area efficient architectures of circular symmetry 2-D FIR filters using CSOA-based CSD (Q6573863) (← links)
- Design and implementation of optimized 2D FIR symmetric filter architecture using modified McClellan transformation and CSD-CSE (Q6645147) (← links)
