Pages that link to "Item:Q2734424"
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The following pages link to Efficient VLSI architectures for fast computation of the discrete Fourier transform and its inverse (Q2734424):
Displaying 10 items.
- Hybrid architecture and VLSI implementation of the Cosine-Fourier-Haar transforms (Q607547) (← links)
- Triple-matrix product-based 2D systolic implementation of discrete Fourier transform (Q737012) (← links)
- Calculation scheme based on a weighted primitive: application to image processing transforms (Q836454) (← links)
- Fast discrete Fourier transform computations using the reduced adder graph technique (Q838581) (← links)
- The regularized fast Hartley transform. Optimal formulation of real-data fast Fourier transform for silicon-based implementation in resource-constrained environments. (Q847617) (← links)
- A novel approach to fast discrete Fourier transform (Q1273886) (← links)
- High-performance 1-D and 2-D inverse DWT 5/3 filter architectures for efficient hardware implementation (Q2405843) (← links)
- Hardware efficient fast computation of the discrete Fourier transform (Q2432132) (← links)
- Efficient DFT Architectures Based Upon Symmetries (Q4587971) (← links)
- A VLSI array architecture for realization of DFT, DHT, DCT and DST (Q5958184) (← links)
