Pages that link to "Item:Q2895333"
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The following pages link to Global routing in VLSI design: algorithms, theory, and computational practice (Q2895333):
Displaying 8 items.
- A provably tight delay-driven concurrently congestion mitigating global routing algorithm (Q299423) (← links)
- Approximation scheme for restricted discrete gate sizing targeting delay minimization (Q491218) (← links)
- On routing in VLSI design and communication networks (Q944702) (← links)
- Integer programming in VLSI design (Q1201818) (← links)
- Switchbox routing in VLSI design: Closing the complexity gap (Q1274317) (← links)
- An ILP based hierarchical global routing approach for VLSI ASIC design (Q2463831) (← links)
- VLSI routing in polynomial time (Q2816135) (← links)
- A survey on multi-net global routing for integrated circuits (Q4539951) (← links)