Pages that link to "Item:Q293885"
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The following pages link to Optimization approaches for designing quantum reversible arithmetic logic unit (Q293885):
Displaying 12 items.
- Energy efficient adiabatic multiplier-accumulator design (Q1405465) (← links)
- Optimized 4-bit quantum reversible arithmetic logic unit (Q1700857) (← links)
- Designing novel quaternary quantum reversible subtractor circuits (Q1703508) (← links)
- Optimization approaches for designing a novel 4-bit reversible comparator (Q1945393) (← links)
- Optimization of quantum Boolean circuits by relative-phase Toffoli gates (Q2097404) (← links)
- Efficient techniques for fault detection and location of multiple controlled Toffoli-based reversible circuit (Q2099595) (← links)
- Novel design for reversible arithmetic logic unit (Q2342841) (← links)
- Novel quaternary quantum decoder, multiplexer and demultiplexer circuits (Q2363247) (← links)
- On design of parity preserving reversible adder circuits (Q2400197) (← links)
- Reversible and Quantum Circuit Optimization: A Functional Approach (Q3453739) (← links)
- A fault-tolerant and scalable column-wise reversible quantum multiplier with a reduced size (Q6043556) (← links)
- A dynamic programming approach to multi-objective logic synthesis of quantum circuits (Q6089495) (← links)
