The following pages link to Rolf Drechsler (Q294812):
Displaying 50 items.
- On the computational power of linearly transformed BDDs (Q294813) (← links)
- Ancilla-free synthesis of large reversible functions using binary decision diagrams (Q491242) (← links)
- Synthesis of quantum circuits for linear nearest neighbor architectures (Q544832) (← links)
- Weighted \(A^*\) search - unifying view and application (Q840833) (← links)
- Binary decision diagrams in theory and practice (Q1606800) (← links)
- Semi-formal cycle-accurate temporal execution traces reconstruction (Q1683467) (← links)
- Towards VHDL-based design of reversible circuits. Work in progress report (Q1705586) (← links)
- Efficient construction of QMDDs for irreversible, reversible, and quantum functions (Q1705610) (← links)
- Multi-objective synthesis of quantum circuits using Genetic Programming (Q1796387) (← links)
- The complexity of error metrics (Q1799556) (← links)
- On the relation between BDDs and FDDs (Q1908345) (← links)
- Property-driven timestamps encoding for timeprints-based tracing and monitoring (Q2176696) (← links)
- Upper bounds for reversible circuits based on Young subgroups (Q2446569) (← links)
- Considering nearest neighbor constraints of quantum circuits at the reversible circuit level (Q2454191) (← links)
- Complexity of reversible circuits and their quantum implementations (Q2634672) (← links)
- Advanced exact synthesis of Clifford+T circuits (Q2681689) (← links)
- Equivalence checking of digital circuits in an industrial environment (Q2746577) (← links)
- (Q2768618) (← links)
- Technology Mapping for Single Target Gate Based Circuits Using Boolean Functional Decomposition (Q2822513) (← links)
- Towards Line-Aware Realizations of Expressions for HDL-Based Synthesis of Reversible Circuits (Q2822514) (← links)
- On the “Q” in QMDDs: Efficient Representation of Quantum Functionality in the QMDD Data-Structure (Q2868443) (← links)
- Reversible Circuit Synthesis of Symmetric Functions Using a Simple Regular Structure (Q2868448) (← links)
- Exploiting Negative Control Lines in the Optimization of Reversible Circuits (Q2868451) (← links)
- Reducing the Depth of Quantum Circuits Using Additional Circuit Lines (Q2868452) (← links)
- Encoding OCL Data Types for SAT-Based Verification of UML/OCL Models (Q3012970) (← links)
- High Quality Test Pattern Generation and Boolean Satisfiability (Q3106263) (← links)
- (Q3149543) (← links)
- Initial Ideas for Automatic Design and Verification of Control Logic in Reversible HDLs (Q3186590) (← links)
- Quantum Circuit Optimization by Hadamard Gate Reduction (Q3188921) (← links)
- Mapping NCV Circuits to Optimized Clifford+T Circuits (Q3188922) (← links)
- Equivalence Checking in Multi-level Quantum Systems (Q3188926) (← links)
- Property Checking of Quantum Circuits Using Quantum Multiple-Valued Decision Diagrams (Q3453751) (← links)
- Using πDDs in the Design of Reversible Circuits (Q3453752) (← links)
- Lazy-CSeq-SP: Boosting Sequentialization-Based Verification of Multi-threaded C Programs via Symbolic Pruning of Redundant Schedules (Q3460565) (← links)
- (Q3528927) (← links)
- (Q3528928) (← links)
- Towards a Design Flow for Reversible Logic (Q3577129) (← links)
- (Q3620427) (← links)
- Test Pattern Generation using Boolean Proof Engines (Q3631306) (← links)
- (Q4215790) (← links)
- (Q4263885) (← links)
- (Q4418398) (← links)
- Fast OFDD-based minimization of fixed polarity Reed-Muller expressions (Q4420806) (← links)
- (Q4422288) (← links)
- (Q4448597) (← links)
- (Q4504717) (← links)
- History-based dynamic BDD minimization (Q4539952) (← links)
- (Q4544352) (← links)
- Pseudo-Kronecker expressions for symmetric functions (Q4571422) (← links)
- OKFDDs versus OBDDs and OFDDs (Q4645202) (← links)
