Pages that link to "Item:Q3122470"
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The following pages link to Performance optimization of VLSI interconnect layout (Q3122470):
Displaying 6 items.
- Optimal VLSI delay tuning by wire shielding (Q328471) (← links)
- Computing a \((1+\varepsilon)\)-approximate geometric minimum-diameter spanning tree (Q1879253) (← links)
- Algorithms for synthesizing mechanical systems with maximal natural frequencies (Q1926188) (← links)
- A survey on multi-net global routing for integrated circuits (Q4539951) (← links)
- (Q4764186) (← links)
- VLSI circuit performance optimization by geometric programming (Q5959326) (← links)