The following pages link to (Q3436637):
Displaying 5 items.
- Pipelining the adaptive decision feedback equalizer with zero latency (Q948330) (← links)
- Power efficient folding of pipelined LMS adaptive filters with applications to wireline digital communications (Q1584049) (← links)
- High speed FPGA-based implementations of delayed-LMS filters (Q2574078) (← links)
- A Pipelined FFT Architecture for Real-Valued Signals (Q5010862) (← links)
- A fully pipelined RLS-based array for channel equalization (Q5687850) (← links)
