The following pages link to (Q4028111):
Displaying 19 items.
- Relating bends and size in orthogonal graph drawings (Q293201) (← links)
- Bend-optimal orthogonal graph drawing in the general position model (Q390165) (← links)
- A framework for solving VLSI graph layout problems (Q796306) (← links)
- Multilayer grid embeddings for VLSI (Q916362) (← links)
- Paths, flows, and VLSI-layout. Proceedings of a meeting held from June 20 to July 1, 1988, at the University of Bonn, Germany (Q1188767) (← links)
- A better heuristic for orthogonal graph drawings (Q1384200) (← links)
- Three-dimensional orthogonal graph drawing algorithms (Q1570822) (← links)
- Drawing graphs on rectangular grids (Q1902892) (← links)
- Optimal two-sided embeddings of complete binary trees in rectangular grids (Q2332034) (← links)
- Separator-based graph embedding into multidimensional grids with small edge-congestion (Q2341722) (← links)
- Complexity dichotomy on degree-constrained VLSI layouts with unit-length edges (Q2883585) (← links)
- (Q3709898) (← links)
- An Array Layout Methodology for VLSI Circuits (Q3743256) (← links)
- Linear placement algorithms and applications to VLSI design (Q3783832) (← links)
- Optimal three-dimensional VLSI layouts (Q4739807) (← links)
- (Q4859913) (← links)
- Maximum Area Axis-Aligned Square Packings. (Q5005181) (← links)
- Optimal orthogonal drawings of triconnected plane graphs (Q5054824) (← links)
- How vulnerable is an undirected planar graph with respect to max flow (Q6196897) (← links)
