Pages that link to "Item:Q4034618"

The following pages link to Implementation of Efficient FFT Algorithms on Fused Multiply- Add Architectures (Q4034618):

Displaying 18 items.

• A low-memory-access length-adaptive architecture for \(2^n\)-point FFT (Q736386) (← links)
• A methodology for designing, modifying, and implementing Fourier transform algorithms on various architectures (Q753467) (← links)
• Implementation of a self-sorting in-place prime factor FFT algorithm (Q1087005) (← links)
• A reduced-complexity fast algorithm for software implementation of the IFFT/FFT in DMT systems (Q1773594) (← links)
• Effective implementations of multi-dimensional radix-2 FFT (Q1973543) (← links)
• Scalable FFT processors and pipelined butterfly units (Q2432171) (← links)
• Multiplierless implementation of rotators and FFTs (Q2502864) (← links)
• (Q2993241) (← links)
• Algorithms for defining mixed radix FFT flow graphs (Q3031918) (← links)
• Implementation of FFT Structures Using the Residue Number System (Q3859280) (← links)
• Modified FFTs for Fused Multiply-Add Architectures (Q4293974) (← links)
• Fast Radix 2, 3, 4, and 5 Kernels for Fast Fourier Transformations on Computers with Overlapping Multiply--Add Instructions (Q4376254) (← links)
• Hybrid Wordlength Optimization Methods of Pipelined FFT Processors (Q4564197) (← links)
• Fixed-Point Analysis and Parameter Optimization of the Radix-<formula formulatype="inline"><tex Notation="TeX">$2^{k}$</tex> </formula> Pipelined FFT Processor (Q4580802) (← links)
• MULTIPLY-ADD OPTIMIZED FFT KERNELS (Q4798854) (← links)
• World’s Fastest FFT Architectures: Breaking the Barrier of 100 GS/s (Q5007586) (← links)
• FFT Implementation with Fused Floating-Point Operations (Q5277672) (← links)
• Compiler Construction (Q5309675) (← links)