Pages that link to "Item:Q4564236"
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The following pages link to Fast Parallel-Prefix Architectures for Modulo 2n-1 Addition with a Single Representation of Zero (Q4564236):
Displaying 4 items.
- Fast prefix adders for non-uniform input arrival times (Q513308) (← links)
- \(k\)-block parallel addition versus 1-block parallel addition in non-standard numeration systems (Q2250444) (← links)
- Design of reverse converters for a new flexible RNS five-moduli set \(\{ 2^k, 2^n-1, 2^n+1, 2^{n+1}-1, 2^{n-1}-1 \}\) (\(n\) even) (Q2411718) (← links)
- Symmetric encryption algorithms in a polynomial residue number system (Q6577838) (← links)