Pages that link to "Item:Q5897075"
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The following pages link to Correct Hardware Design and Verification Methods (Q5897075):
Displaying 8 items.
- Simulation refinement for concurrency verification (Q541209) (← links)
- The existence of refinement mappings (Q805251) (← links)
- Algebraic simulations (Q844884) (← links)
- A framework for verifying bit-level pipelined machines based on automated deduction and decision procedures (Q877828) (← links)
- Expressive completeness failure in branching time structures (Q1109759) (← links)
- Twenty years of rewriting logic (Q1931904) (← links)
- Specification and verification of concurrent programs through refinements (Q2351261) (← links)
- Universal extensions to simulate specifications (Q2475808) (← links)