Pages that link to "Item:Q835773"
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The following pages link to Formal memory models for the verification of low-level operating-system code (Q835773):
Displaying 16 items.
- Balancing the load. Leveraging a semantics stack for systems verification (Q835780) (← links)
- Formal verification of a C-like memory model and its uses for verifying program transformations (Q945054) (← links)
- Mechanising a formal model of flash memory (Q1004295) (← links)
- Operating system verification---an overview (Q1040002) (← links)
- Formal stystems specification. The RPC-memory specification case study (Q1126523) (← links)
- Toward compositional verification of interruptible OS kernels and device drivers (Q1663225) (← links)
- Physical addressing on real hardware in Isabelle/HOL (Q1791136) (← links)
- Program verification in the presence of cached address translation (Q1791200) (← links)
- Formal reasoning under cached address translation (Q2209539) (← links)
- System-level non-interference of constant-time cryptography. I: Model (Q2417947) (← links)
- Formally Verified Implementation of an Idealized Model of Virtualization (Q2968409) (← links)
- Types, Maps and Separation Logic (Q3183535) (← links)
- Operating system task management requirements layer modeling and verification based on Coq (Q3386299) (← links)
- Effective Abstractions for Verification under Relaxed Memory Models (Q5172657) (← links)
- Correct Hardware Design and Verification Methods (Q5897057) (← links)
- A verified specification of TLSF memory management allocator using state monads (Q6535916) (← links)