The following pages link to Floorplan design of VLSI circuits (Q1113879):
Displaying 15 items.
- VLSI floorplanning based on the integration of adaptive search models (Q394070) (← links)
- New perspectives in VLSI design automation: deterministic packing by sequence pair (Q610960) (← links)
- Customized simulated annealing based decision algorithms for combinatorial optimization in VLSI floorplanning problem (Q694524) (← links)
- Corner block list representation and its application with boundary constraints (Q866048) (← links)
- Stats: A slicing tree and tabu search based heuristic for the unequal area facility layout problem (Q1011279) (← links)
- A nonlinear optimization methodology for VLSI fixed-outline floorplanning (Q1016045) (← links)
- Applying ant system for solving unequal area facility layout problems (Q1040995) (← links)
- Floorplanning by graph dualization: \(L\)-shaped modules (Q1310461) (← links)
- Stochastic simulations of two-dimensional composite packings (Q1372030) (← links)
- Complexity and approximability results for slicing floorplan designs. (Q1399599) (← links)
- Computing elastic moduli of two-dimensional random networks of rigid and nonrigid bonds by simulated annealing (Q1404632) (← links)
- Extensions to STaTS for practical applications of the facility layout problem (Q2267647) (← links)
- VLSI floorplanning based on a hybrid differential evolution algorithm (Q2916417) (← links)
- An Array Layout Methodology for VLSI Circuits (Q3743256) (← links)
- (Q4004368) (← links)
