Pages that link to "Item:Q1695972"
From MaRDI portal
The following pages link to Masking AES with \(d+1\) shares in hardware (Q1695972):
Displaying 13 items.
- Correlation power analysis and higher-order masking implementation of WAGE (Q832394) (← links)
- Lightweight authenticated encryption mode suitable for threshold implementation (Q2119030) (← links)
- Monomial evaluation of polynomial functions protected by threshold implementations -- with an illustration on AES -- extended version (Q2120989) (← links)
- Spin me right round rotational symmetry for FPGA-specific AES: extended version (Q2188965) (← links)
- SILVER -- statistical independence and leakage verification (Q2692368) (← links)
- A Tale of Two Shares: Why Two-Share Threshold Implementation Seems Worthwhile—and Why It Is Not (Q2958149) (← links)
- An Efficient Side-Channel Protected AES Implementation with Arbitrary Protection Order (Q2975799) (← links)
- On Masked Galois-Field Multiplication for Authenticated Encryption Resistant to Side Channel Analysis (Q3297551) (← links)
- A First-Order SCA Resistant AES Without Fresh Randomness (Q3297561) (← links)
- Parallel Implementations of Masking Schemes and the Bounded Moment Leakage Model (Q5738889) (← links)
- Analyzing masked ciphers against transition and coupling effects (Q6157583) (← links)
- Formal verification of arithmetic masking in hardware and software (Q6535070) (← links)
- A low-randomness second-order masked AES (Q6618584) (← links)
