Pages that link to "Item:Q1779143"
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The following pages link to Concurrent placement and routing in the design of integrated circuits (Q1779143):
Displaying 10 items.
- Solution of placement and routing problems in telephone exchange unit designs (Q1109671) (← links)
- Concurrent algorithm for circuit layout (Q1183833) (← links)
- The pin redistribution problem in multi-chip modules (Q1327562) (← links)
- PORA: a Physarum-inspired obstacle-avoiding routing algorithm for integrated circuit design (Q1988865) (← links)
- A new multi-objective mathematical model for the high-level synthesis of integrated circuits (Q2289180) (← links)
- An algorithm for finding an approximate solution to the Weber problem on a line with forbidden gaps (Q3186858) (← links)
- Practical Automatic Placement for Standard-Cell Integrated Circuits (Q4207617) (← links)
- (Q4407327) (← links)
- Optimization of location of interconnected facilities on parallel lines with forbidden zones (Q5100137) (← links)
- A Constraint Satisfaction Approach for Programmable Logic Detailed Placement (Q5326465) (← links)