The following pages link to J. Duato (Q192469):
Displaying 30 items.
- MMR: a multimedia router architecture to support hybrid workloads (Q2369679) (← links)
- FIR: an efficient routing strategy for tori and meshes (Q2507105) (← links)
- (Q2777272) (← links)
- N-Dimensional Twin Torus Topology (Q2982055) (← links)
- Design of Hybrid Second-Level Caches (Q2982192) (← links)
- Adaptive routing for n-Dimensional Twin torus (Q2985184) (← links)
- Bandwidth-Aware On-Line Scheduling in SMT Multicores (Q2985617) (← links)
- Enforcing Predictability of Many-Cores With DCFNoC (Q3389746) (← links)
- (Q3790541) (← links)
- (Q4305299) (← links)
- (Q4417466) (← links)
- An Efficient and Deadlock-Free Network Reconfiguration Protocol (Q4589589) (← links)
- (Q4738677) (← links)
- (Q4738679) (← links)
- (Q4790610) (← links)
- (Q4791669) (← links)
- (Q4791962) (← links)
- (Q4813144) (← links)
- (Q4813145) (← links)
- (Q4815736) (← links)
- Deadlock-free dynamic reconfiguration over InfiniBand™ NETWORKS (Q4823583) (← links)
- SUBOPTIMAL-OPTIMAL ROUTING FOR LAN INTERNETWORKING USING TRANSPARENT BRIDGES (Q5248971) (← links)
- Building 3D Torus Using Low-Profile Expansion Cards (Q5267353) (← links)
- Increasing the Effectiveness of Directory Caches by Avoiding the Tracking of Noncoherent Memory Blocks (Q5274327) (← links)
- Hardware-based generation of independent subtraces of instructions in clustered processors (Q5274395) (← links)
- Progressive Congestion Management Based on Packet Marking and Validation Techniques (Q5274633) (← links)
- Extending Magny-Cours Cache Coherence (Q5277594) (← links)
- Dynamic Fault Tolerance in Fat Trees (Q5280598) (← links)
- Perf&Fair: A Progress-Aware Scheduler to Enhance Performance and Fairness in SMT Multicores (Q5349467) (← links)
- A comparison of router architectures for virtual cut-through and wormhole switching in a NOW environment (Q5938736) (← links)
