The following pages link to Tamir Heyman (Q209465):
Displaying 12 items.
- Distributed symbolic model checking for \(\mu\)-calculus (Q816198) (← links)
- An abstraction algorithm for the verification of level-sensitive latch-based netlists (Q1425001) (← links)
- A scalable parallel algorithm for reachability analysis of very large circuits (Q1871864) (← links)
- A work-efficient distributed algorithm for reachability analysis (Q2431764) (← links)
- (Q2754071) (← links)
- Dominant Controllability Check Using QBF-Solver and Netlist Optimizer (Q3192072) (← links)
- VERIFYING VERY LARGE INDUSTRIAL CIRCUITS USING 100 PROCESSES AND BEYOND (Q3426787) (← links)
- (Q4553260) (← links)
- (Q4817534) (← links)
- Correct Hardware Design and Verification Methods (Q5493223) (← links)
- Computer Aided Verification (Q5900670) (← links)
- On the effective deployment of functional formal verification (Q5946345) (← links)