The following pages link to Xiaoheng Chen (Q221838):
Displaying 5 items.
- Efficient Configurable Decoder Architecture for Nonbinary Quasi-Cyclic LDPC Codes (Q5008679) (← links)
- High-Throughput Efficient Non-Binary LDPC Decoder Based on the Simplified Min-Sum Algorithm (Q5010471) (← links)
- Memory System Optimization for FPGA-Based Implementation of Quasi-Cyclic LDPC Codes Decoders (Q5010540) (← links)
- Hardware Implementation of a Backtracking-Based Reconfigurable Decoder for Lowering the Error Floor of Quasi-Cyclic LDPC Codes (Q5010817) (← links)
- A new semiparametric spatial model for panel time series (Q5952026) (← links)