Pages that link to "Item:Q2895778"
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The following pages link to From concurrent multi-clock programs to deterministic asynchronous implementations (Q2895778):
Displaying 8 items.
- Formal modelling and verification of GALS systems using GRL and CADP (Q315303) (← links)
- Compositional design of isochronous systems (Q456402) (← links)
- Extending the wait-free hierarchy to multi-threaded systems (Q2166369) (← links)
- Deterministic concurrency: a clock-synchronised shared memory approach (Q2323968) (← links)
- Concurrency in synchronous systems (Q2505637) (← links)
- Constructive Polychronous Systems (Q3455857) (← links)
- Concurrent Rewriting Semantics and Analysis of Asynchronous Digital Circuits (Q4933283) (← links)
- Coupling asynchrony and interrupts: Place Chart Nets (Q6487382) (← links)