The following pages link to (Q3139548):
Displaying 14 items.
- On the recovery procedure for LQG systems (Q1102920) (← links)
- Necessary and sufficient conditions for a nonminimum phase plant to have a recoverable target loop. A stable compensator design for LTR (Q1194972) (← links)
- \(H^ \infty\)/LTR procedure with specified degree of recovery (Q1194973) (← links)
- Discrete-time loop transfer recovery for systems with nonminimum phase zeros and time delays (Q1801976) (← links)
- Loop transfer recovery. Analysis and design (Q1917978) (← links)
- Integral controller design based on disturbance cancellation: partial LTR approach for non-minimum phase plants (Q2576155) (← links)
- Loop transfer recovery for nonminimum phase plants (Q3486447) (← links)
- Loop shaping design related to LQG/LTR for SISO minimum phase plants (Q3794012) (← links)
- H∞ loop transfer recovery synthesis of discrete-time systems (Q4212822) (← links)
- (Q4274048) (← links)
- Discrete‐time loop transfer recovery via generalized sampled‐data hold functions based compensator (Q4318482) (← links)
- Loop transfer recovery for systems under sampled measurements (Q4331584) (← links)
- Loop transfer recovery design via new observer‐based and css architecture‐based controllers (Q4862125) (← links)
- Applications of a Compact Controller Architecture (Q5054357) (← links)