The following pages link to Edward J. McCluskey (Q3321985):
Displaying 13 items.
- Verification Testing—A Pseudoexhaustive Test Technique (Q3321986) (← links)
- Analysis of Logic Circuits with Faults Using Input Signal Probabilities (Q4055547) (← links)
- (Q4068036) (← links)
- Probabilistic Treatment of General Combinational Networks (Q4071171) (← links)
- The Error Latency of a Fault in a Sequential Digital Circuit (Q4101731) (← links)
- Multivalued Integrated Injection Logic (Q4145303) (← links)
- Boolean Network Probabilities and Network Design (Q4149382) (← links)
- Sequential Circuit Output Probabilities From Regular Expressions (Q4152164) (← links)
- Logic Design of Multivalued I<sup>2</sup>L Logic Circuits (Q4199982) (← links)
- Floating point fault tolerance with backward error assertions (Q4419647) (← links)
- Counting two-state transition-tour sequences (Q4420817) (← links)
- Calculation of Coverage Parameter (Q4726031) (← links)
- Fault Equivalence in Combinational Logic Networks (Q5639633) (← links)