The following pages link to Permutation layout (Q4189280):
Displaying 9 items.
- Routing vertex disjoint Steiner-trees in a cubic grid and connections to VLSI (Q858297) (← links)
- Multilayer grid embeddings for VLSI (Q916362) (← links)
- A lower bound on the area of permutation layouts (Q922710) (← links)
- Efficient enumeration of all ladder lotteries and its application (Q964388) (← links)
- Asymptotic component densities in programmable gate arrays realizing all circuits of a given size (Q1206434) (← links)
- A note on solving the fleet quickest routing problem on a grid graph (Q2201314) (← links)
- (Q4007500) (← links)
- General circular permutation layout (Q4013405) (← links)
- Improved approximation for node-disjoint paths in grids with sources on the boundary (Q5002709) (← links)