The following pages link to (Q4967228):
Displaying 12 items.
- Towards formally specifying and verifying transactional memory (Q470040) (← links)
- On avoiding spare aborts in transactional memory (Q493661) (← links)
- Transactional memory (Q666225) (← links)
- Embedded-TM: energy and complexity-effective hardware transactional memory for embedded multicore systems (Q666237) (← links)
- Extensible transactional memory testbed (Q666242) (← links)
- Implementation tradeoffs in the design of flexible transactional memory support (Q666246) (← links)
- Inherent limitations on disjoint-access parallel implementations of transactional memory (Q693754) (← links)
- Nested transactional memory: Model and architecture sketches (Q856912) (← links)
- \(\mathrm {TM}^{2}\mathrm {C}\): a software transactional memory for many-cores (Q1656883) (← links)
- Bounded memory protocols (Q2339157) (← links)
- Non-interference and local correctness in transactional memory (Q2357153) (← links)
- Calculating Statically Maximum Log Memory Used by Multi-threaded Transactional Programs (Q3179394) (← links)