Pages that link to "Item:Q5458842"
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The following pages link to Automata and Logics for Timed Message Sequence Charts (Q5458842):
Displaying 6 items.
- A concurrency-preserving translation from time Petri nets to networks of timed automata (Q453542) (← links)
- Event clock message passing automata: a logical characterization and an emptiness checking algorithm (Q2248059) (← links)
- Checking conformance for time-constrained scenario-based specifications (Q2355682) (← links)
- SMT-based scenario verification for hybrid systems (Q2441772) (← links)
- Timed semantics of message sequence charts based on timed automata (Q2842583) (← links)
- Proving sequential function chart programs using timed automata (Q5958730) (← links)