Pages that link to "Item:Q5897071"
From MaRDI portal
The following pages link to Correct Hardware Design and Verification Methods (Q5897071):
Displaying 16 items.
- Multi-parameterised compositional verification of safety properties (Q498394) (← links)
- An invariant-based approach to the verification of asynchronous parameterized networks (Q604385) (← links)
- Efficient methods for formally verifying safety properties of hierarchical cache coherence protocols (Q968361) (← links)
- Parameterized model checking of rendezvous systems (Q1635829) (← links)
- Towards general and exact distributed invalidation (Q1877633) (← links)
- Constraint-based verification of parameterized cache coherence protocols (Q1878907) (← links)
- Parameterized model checking of networks of timed automata with Boolean guards (Q1989334) (← links)
- Specification and verification of concurrent programs through refinements (Q2351261) (← links)
- Model Checking Parameterized Systems (Q3176379) (← links)
- (Q4953365) (← links)
- Verifying Parameterized taDOM+ Lock Managers (Q5448673) (← links)
- Formal Methods in Computer-Aided Design (Q5492994) (← links)
- Verification, Model Checking, and Abstract Interpretation (Q5711516) (← links)
- A case study on parametric verification of failure detectors (Q5883746) (← links)
- Deriving efficient cache coherence protocols through refinement (Q5959861) (← links)
- Parameterized verification under TSO with data types (Q6535379) (← links)