Systolische Berechnungen und VLSI (Q1057060)
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scientific article; zbMATH DE number 3896292
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Systolische Berechnungen und VLSI |
scientific article; zbMATH DE number 3896292 |
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Systolische Berechnungen und VLSI (English)
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1984
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The authors explain the paradigms of the design of systolic algorithms through a discussion of systolic queues, stacks, and trees as well as pattern matching and matrix multiplication. The principles of systolic architectures are outlined and the design of a systolic chip for inverting a nonsingular \(n\times n\) matrix in O(n) time is discussed in detail.
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systolic computation
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matrix inversion
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design of systolic algorithms
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pattern matching
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matrix multiplication
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systolic architectures
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0.82535106
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0.79386216
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