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LUCAS. Associative array processor. Design, programming and application studies (Q1071495)

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scientific article; zbMATH DE number 3940706
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English
LUCAS. Associative array processor. Design, programming and application studies
scientific article; zbMATH DE number 3940706

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    LUCAS. Associative array processor. Design, programming and application studies (English)
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    1986
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    LUCAS, an associative array processor, is defined as an SIMD processor with one control unit and many processing elements (PE's) which are activated by an associative process, i.e. by some property of the contents of the memory of the PE, and there is a topological relationship between the PE's, e.g. a linear array or a two-dimensional grid. The report is subdivided into three parts: Part 1 develops the theory and system architecture, Part 2 is devoted to programming aspects and Part 3 deals with application problems, above all with relational database processing and image processing. An epiloge discusses conclusions and continued research. I consider this report as an extremely valuable study of parallel processing, but for me there is always the contradiction of efficiency and robustness: Such parallel processors are very efficient for dedicated problems but they will immediately loose the efficiency in a universal environment although the authors claim that LUCAS is more general than they initially believed.
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    LUCAS
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    associative array processor
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    SIMD processor
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    parallel processing
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