The Cray X-MP/Model 24. A case study in pipelined architecture and vector processing (Q1187670)
From MaRDI portal
| This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: The Cray X-MP/Model 24. A case study in pipelined architecture and vector processing |
scientific article; zbMATH DE number 43710
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | The Cray X-MP/Model 24. A case study in pipelined architecture and vector processing |
scientific article; zbMATH DE number 43710 |
Statements
The Cray X-MP/Model 24. A case study in pipelined architecture and vector processing (English)
0 references
17 September 1992
0 references
Excellent booklet! The booklet gives a detailed description of the hardware (assembler) instructions, their timings, their mutual interference and their relation to programming style. A description of interprocessor communication and multitasking is included. The appendix contains an instruction execution summary of the X-MP. The presentation of the material is an excellent combination of explanations and examples. Unfortunately the booklet describes the ``old'' X-MP (without gather/scatter/compressed index instructions) that has now developed to the X-MP with improved memory access, so that detailed information is already obsolete, but the basic information is not.
0 references
Cray X-MP
0 references
vector processor
0 references
assemble instructions
0 references
multi-tasking
0 references
pipeline architecture
0 references
0.7198992371559143
0 references
0.7158870697021484
0 references