Automatic synthesis of motion estimation processors based on a new class of hardware architectures (Q1405521)
From MaRDI portal
 | This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: Automatic synthesis of motion estimation processors based on a new class of hardware architectures |
scientific article; zbMATH DE number 1971006
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Automatic synthesis of motion estimation processors based on a new class of hardware architectures |
scientific article; zbMATH DE number 1971006 |
Statements
Automatic synthesis of motion estimation processors based on a new class of hardware architectures (English)
0 references
25 August 2003
0 references
motion estimation
0 references
block matching
0 references
array architectures
0 references
specialized processors
0 references
0.7819896340370178
0 references
0.7350537776947021
0 references
