Cryptographic hardware and embedded systems - CHES 2000. 2nd international workshop, Worcester, MA, USA, August 17--18, 2000. Proceedings (Q1591871)
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scientific article; zbMATH DE number 1550316
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| English | Cryptographic hardware and embedded systems - CHES 2000. 2nd international workshop, Worcester, MA, USA, August 17--18, 2000. Proceedings |
scientific article; zbMATH DE number 1550316 |
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Cryptographic hardware and embedded systems - CHES 2000. 2nd international workshop, Worcester, MA, USA, August 17--18, 2000. Proceedings (English)
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10 January 2001
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The articles of mathematical interest will be reviewed individually. The preceding workshop (1st, 1999) has been reviewed (see Zbl 0929.00092). Indexed articles: \textit{Hankerson, Darrel; Hernandez, Julio López; Menezes, Alfred}, Software implementation of elliptic curve cryptography over binary fields, 1-24 [Zbl 0998.94534] \textit{Okada, Souichi; Torii, Naoya; Itoh, Kouichi; Takenaka, Masahiko}, Implementation of elliptic curve cryptographic coprocessor over \(\text{GF}(2^m)\) on a FPGA, 25-40 [Zbl 0998.68649] \textit{Orlando, Gerardo; Paar, Christof}, A high-performance reconfigurable elliptic curve processor for \(\text{GF}(S^m)\), 41-56 [Zbl 0998.68650] \textit{Chung, Jae Wook; Sim, Sang Gyoo; Lee, Pil Joong}, Fast implementation of elliptic curve defined over \(\text{GF}(p^m)\) on \(\text{CalmRISC}\) with \(\text{MAC}2424\) coprocessor, 57-70 [Zbl 0998.68654] \textit{Shamir, Adi}, Protecting smart cards from passive power analysis with detached power supplies, 71-77 [Zbl 0998.68656] \textit{Mayer-Sommer, Rita}, Smartly analyzing the simplicity and the power of simple power analysis on smartcards, 78-92 [Zbl 0998.68658] \textit{Hasan, M. Anwar}, Power analysis attacks and algorithmic approaches to their countermeasures for Koblitz curve cryptosystems, 93-108 [Zbl 0998.94535] \textit{Schindler, Werner}, A timing attack against RSA with the Chinese Remainder Theorem, 109-124 [Zbl 0998.94536] \textit{Dandalis, Andreas; Prasanna, Viktor K.; Rolim, Jose D. P.}, A comparative study of performance of AES final candidates using FPGAs, 125-140 [Zbl 0998.68663] \textit{Patterson, Cameron}, A dynamic FPGA implementation of the Serpent block cipher, 141-155 [Zbl 0998.68665] \textit{Trimberger, Steve; Pang, Raymond; Singh, Amit}, A 12 Gbps DES encryptor/decryptor core in an FPGA, 156-163 [Zbl 0998.68666] \textit{Leitold, Herbert; Mayerwieser, Wolfgang; Payer, Udo; Posch, Karl Christian; Posch, Reinhard; Wolkerstorfer, Johannes}, A 155 Mbps triple-DES network encryptor, 164-174 [Zbl 0998.68670] \textit{Goodman, James; Chandrakasan, Anantha}, An energy efficient reconfigurable public-key cryptography processor architecture, 175-190 [Zbl 0998.68672] \textit{Großschädl, Johann}, High-speed RSA hardware based on Barret's modular reduction method, 191-203 [Zbl 0998.68674] \textit{Walter, Colin D.}, Data integrity in hardware for modular arithmetic, 204-215 [Zbl 0998.94565] \textit{Kato, Takehiko; Ito, Satoru; Anzai, Jun; Matsuzaki, Natsume}, A design for modular exponentiation coprocessor in mobile telecommunication terminals, 216-228 [Zbl 0998.68677] \textit{Naccache, David; Tunstall, Michael}, How to explain side-channel leakage to your kids, 229-230 [Zbl 0998.68679] \textit{Coron, Jean-Sébastien; Goubin, Louis}, On Boolean and arithmetic masking against differential power analysis, 231-237 [Zbl 0998.94537] \textit{Messerges, Thomas S.}, Using second-order power analysis to attack DPA resistant software, 238-251 [Zbl 0998.94538] \textit{Clavier, Christophe; Coron, Jean-Sébastien; Dabbous, Nora}, Differential power analysis in the presence of hardware countermeasures, 252-263 [Zbl 0998.94539] \textit{Wu, Huapeng}, Montgomery multiplier and squarer in \(\text{GF}(2^m)\), 264-276 [Zbl 0998.68685] \textit{Savaş, Erkay; Tenca, Alexandre F.; Koç, Çetin K.}, A scalable and unified multiplier architecture for finite fields \(\text{GF}(p)\) and \(\text{GF}(2^m)\), 277-292 [Zbl 0998.68687] \textit{Hachez, Gaël; Quisquater, Jean-Jacques}, Montgomery exponentiation with no final subtractions: Improved results, 293-301 [Zbl 0998.94540] \textit{Weingart, Steve H.}, Physical security devices for computer subsystems: A survey of attacks and defenses, 302-317 [Zbl 0998.68690] \textit{Pornin, Thomas; Stern, Jacques}, Software-hardware trade-offs: Application to A5/1 cryptanalysis, 318-327 [Zbl 0998.68692] \textit{Hoffstein, Jeffrey; Silverman, Joseph H.}, MiniPASS: Authentication and digital signatures in a constrained environment, 328-339 [Zbl 0998.94547] \textit{Joye, Marc; Paillier, Pascal; Vaudenay, Serge}, Efficient generation of prime numbers, 340-354 [Zbl 0998.11500]
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Worcester, MA (USA)
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Proceedings
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Workshop
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CHES 2000
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Cryptographic hardware
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Embedded systems
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