Verisym: Verifying circuits by symbolic simulation (Q1870230)
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scientific article; zbMATH DE number 1908525
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Verisym: Verifying circuits by symbolic simulation |
scientific article; zbMATH DE number 1908525 |
Statements
Verisym: Verifying circuits by symbolic simulation (English)
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11 May 2003
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circuit extraction
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symbolic simulation
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formal property checking
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memory verification
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0.7441881895065308
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