A computational engine for multirate FIR digital filtering. (Q1978410)

Digital filtering is a key computation in digital signal processing (DSP) applications. There exist a wide variety of high-performance portable systems that rely on embedded DSP systems to varying degrees. It is therefore necessary that such systems are both versatile and power efficient. In this paper, we propose a computational engine (CE) to serve as an ASIP implementing compute-intensive/power-critical multirate finite-impulse-response (FIR) digital filtering algorithms in embedded systems. The CE is programmable and is comprised of the data path and the control path. Control sequences necessary to realize a particular filter operation can be programmed onto the control path of the CE. The versatility and efficacy of the proposed CE is demonstrated in this paper.