Run-time-reconfigurable multi-precision floating-point matrix multiplier intellectual property core on FPGA (Q2399130)
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| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Run-time-reconfigurable multi-precision floating-point matrix multiplier intellectual property core on FPGA |
scientific article |
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Run-time-reconfigurable multi-precision floating-point matrix multiplier intellectual property core on FPGA (English)
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21 August 2017
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FPGA
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run-time-reconfigurable
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variable-precision
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vedic mathematics
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Karatsuba
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