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Hardness-Randomness Tradeoffs for Bounded Depth Arithmetic Circuits - MaRDI portal

Hardness-Randomness Tradeoffs for Bounded Depth Arithmetic Circuits (Q3586180)

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Hardness-Randomness Tradeoffs for Bounded Depth Arithmetic Circuits
scientific article

    Statements

    title
    Hardness-Randomness Tradeoffs for Bounded Depth Arithmetic Circuits (English)
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    author
    Zeev Dvir
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    Amir Shpilka
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    Amir Yehudayoff
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    publication date
    6 September 2010
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    zbMATH Keywords
    polynomial identity testing
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    derandomization
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    polynomial factoring
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    hardness
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    randomness
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    Identifiers

    DOI
    10.1137/080735850
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    Mathematics Subject Classification ID
    68Q17
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    68W20
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    12Y05
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    zbMATH DE Number
    5779422
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    OpenAlex ID
    W2000108234
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