Design and Implementation of an FPGA-Based 1.452-Gbps Non-pipelined AES Architecture (Q3600122)

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Design and Implementation of an FPGA-Based 1.452-Gbps Non-pipelined AES Architecture
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    Design and Implementation of an FPGA-Based 1.452-Gbps Non-pipelined AES Architecture (English)
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    10 February 2009
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