A timing-driven placement algorithm with the Elmore delay model for row-based VLSIs (Q3840916)
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| Language | Label | Description | Also known as |
|---|---|---|---|
| English | A timing-driven placement algorithm with the Elmore delay model for row-based VLSIs |
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A timing-driven placement algorithm with the Elmore delay model for row-based VLSIs (English)
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13 August 1998
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VLSI CAD
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timing-driven layout design
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interconnection delay
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timing constraint
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Elmore delay
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critical path
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hierarchical partitioning
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nonlinear programming
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