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A graph-theoretic via minimization algorithm for two-layer printed circuit boards - MaRDI portal

A graph-theoretic via minimization algorithm for two-layer printed circuit boards (Q4742710)

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scientific article; zbMATH DE number 3797681
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A graph-theoretic via minimization algorithm for two-layer printed circuit boards
scientific article; zbMATH DE number 3797681

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    A graph-theoretic via minimization algorithm for two-layer printed circuit boards (English)
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    1983
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    polynomial time
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    preassignment of line segments
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