A Hardware-Efficient Feedback Polynomial Topology for DPD Linearization of Power Amplifiers: Theory and FPGA Validation (Q5007149)
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scientific article; zbMATH DE number 7385436
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | A Hardware-Efficient Feedback Polynomial Topology for DPD Linearization of Power Amplifiers: Theory and FPGA Validation |
scientific article; zbMATH DE number 7385436 |
Statements
A Hardware-Efficient Feedback Polynomial Topology for DPD Linearization of Power Amplifiers: Theory and FPGA Validation (English)
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26 August 2021
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