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Settling Time Optimization for Three-Stage CMOS Amplifier Topologies - MaRDI portal

Settling Time Optimization for Three-Stage CMOS Amplifier Topologies (Q5010861)

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scientific article; zbMATH DE number 7386728
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Settling Time Optimization for Three-Stage CMOS Amplifier Topologies
scientific article; zbMATH DE number 7386728

    Statements

    title
    Settling Time Optimization for Three-Stage CMOS Amplifier Topologies (English)
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    author
    Andrea Pugliese
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    Francesco Amoroso
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    Gregorio Cappuccino
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    Giuseppe Cocorullo
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    publication date
    26 August 2021
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    Identifiers

    zbMATH DE Number
    7386728
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