Synthesis of easily testable logic networks under arbitrary stuck-at faults at inputs and outputs of gates (Q5151257)
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scientific article; zbMATH DE number 7311650
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Synthesis of easily testable logic networks under arbitrary stuck-at faults at inputs and outputs of gates |
scientific article; zbMATH DE number 7311650 |
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Synthesis of easily testable logic networks under arbitrary stuck-at faults at inputs and outputs of gates (English)
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17 February 2021
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logic network
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arbitrary stuck-at fault
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fault detection test
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diagnostic test
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