DART: A Programmable Architecture for NoC Simulation on FPGAs (Q5268292)
From MaRDI portal
| This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: DART: A Programmable Architecture for NoC Simulation on FPGAs |
scientific article; zbMATH DE number 6733227
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | DART: A Programmable Architecture for NoC Simulation on FPGAs |
scientific article; zbMATH DE number 6733227 |
Statements
DART: A Programmable Architecture for NoC Simulation on FPGAs (English)
0 references
20 June 2017
0 references