Simulating synchronous processors (Q578903)

In this paper we show how a distributed system with synchronous processors and asynchronous message delays can be simulated by a system with both asynchronous processors and asynchronous message delays in the presence of various types of processor faults. Consequently, the result of \textit{M. Fischer}, \textit{N. Lynch} and \textit{M. Paterson} [J. Assoc. Comput. Mach. 32, 374-382 (1985)] that no consensus protocol for asynchronous processors and communication can tolerate one failstop fault, implies a result of \textit{D. Dolev}, \textit{C. Dwork} and \textit{L. Stockmeyer} [J. Assoc. Comput. Mach. 34 (1987)] that no consensus protocol for synchronous processors and asynchronous communication can tolerate one failstop fault.