Interconnect and lumped elements modeling in interior penalty discontinuous Galerkin time-domain methods (Q602953)

In the present paper, it is developed an interior penalty approach to derive DGTD methods. The proposed method employs a leap-frog scheme for time discretization. Additionally, the authors present a method to incorporate passive lumped elements such as resistors, capacitors, and inductors into the DGTD framework. For the proposed approach, the stability condition of the loaded case is the same as the one of the unloaded case. A numerical example is presented in the final part of this paper in order to validate the proposed approach.