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Fabrizio Lombardi - MaRDI portal

Fabrizio Lombardi

From MaRDI portal
Person:2982063

Available identifiers

zbMath Open lombardi.fabrizioMaRDI QIDQ2982063

List of research outcomes

PublicationDate of PublicationType
Selective Neuron Re-Computation (SNRC) for Error-Tolerant Neural Networks2022-08-05Paper
A Deterministic Low-Complexity Approximate (Multiplier-Less) Technique for DCT Computation2021-08-26Paper
https://portal.mardi4nfdi.de/entity/Q50081642021-08-26Paper
https://portal.mardi4nfdi.de/entity/Q50083312021-08-26Paper
Low-Power Unsigned Divider and Square Root Circuit Designs Using Adaptive Approximation2020-01-28Paper
Efficient Implementations of Reduced Precision Redundancy (RPR) Multiply and Accumulate (MAC)2019-08-13Paper
Two Bit Overlap: A Class of Double Error Correction One Step Majority Logic Decodable Codes2019-08-13Paper
Design and Analysis of Approximate Redundant Binary Multipliers2019-08-13Paper
Coding for Write Latency Reduction in a Multi-Level Cell (MLC) Phase Change Memory (PCM)2019-03-07Paper
A Single and Adjacent Error Correction Code for Fast Decoding of Critical Bits2018-09-20Paper
Majority Logic Formulations for Parallel Adder Designs at Reduced Delay and Circuit Complexity2018-06-27Paper
High Performance Parallel Decimal Multipliers Using Hybrid BCD Codes2018-06-27Paper
Approximate DCT Image Compression Using Inexact Computing2018-06-27Paper
Design of Approximate Radix-4 Booth Multipliers for Error-Tolerant Computing2017-11-10Paper
A Selective Trigger Scan Architecture for VLSI Testing2017-11-10Paper
A Serial Memory by Quantum-Dot Cellular Automata (QCA)2017-11-10Paper
Two Approximate Voting Schemes for Reliable Computing2017-09-21Paper
A Novel Heuristic Method for Application-Dependent Testing of a SRAM-Based FPGA Interconnect2017-07-12Paper
Analysis of Error Masking and Restoring Properties of Sequential Circuits2017-07-12Paper
New Metrics for the Reliability of Approximate and Probabilistic Adders2017-07-12Paper
A Stochastic Computational Approach for Accurate and Efficient Reliability Evaluation2017-06-20Paper
Parallel Decodable Two-Level Unequal Burst Error Correcting Codes2017-05-16Paper
Non-Binary Orthogonal Latin Square Codes for a Multilevel Phase Charge Memory (PCM)2017-05-16Paper
An Analytical Framework for Evaluating the Error Characteristics of Approximate Adders2017-05-16Paper
Design and Analysis of Approximate Compressors for Multiplication2017-05-16Paper
Parallel Decodable Multi-Level Unequal Burst Error Correcting Codes for Memories of Approximate Systems2017-05-16Paper
On the Design of Approximate Restoring Dividers for Error-Tolerant Applications2017-05-16Paper
Approximate Radix-8 Booth Multipliers for Low-Power and High-Performance Operation2017-05-16Paper
Single Multiscale-Symbol Error Correction Codes for Multiscale Storage Systems2017-05-16Paper
A Modified Partial Product Generator for Redundant Binary Multipliers2017-05-16Paper
A Novel Scheme for Tolerating Single Event/Multiple Bit Upsets (SEU/MBU) in Non-Volatile Memories2017-05-16Paper
Design and Analysis of Inexact Floating-Point Adders2017-05-16Paper
A Circuit Model for Fault Tolerance in the Reliable Assembly of Nano-systems2009-05-20Paper
Graph Algorithms for Conformance Testing Using the Rural Chinese Postman Tour1997-03-31Paper
FsmTest: Functional test generation for sequential circuits1997-02-27Paper
https://portal.mardi4nfdi.de/entity/Q56907491997-01-07Paper
Adaptive system-level diagnosis for hypercube multiprocessors1996-01-01Paper
A sweeping line approach to interconnect testing1996-01-01Paper

Research outcomes over time


Doctoral students

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