Hsiang-Hui Chang
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Person:5362875
Available identifiers
zbMath Open chang.hsiang-huiMaRDI QIDQ5362875
List of research outcomes
 | This list is not complete and representing at the moment only items from zbMATH Open and arXiv. We are working on additional sources - please check back here soon! |
| Publication | Date of Publication | Type |
|---|---|---|
| Low Jitter and Multirate Clock and Data Recovery Circuit Using a MSADLL for Chip-to-Chip Interconnection | 2017-10-04 | Paper |
Research outcomes over time
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