Per Stenström

Available identifiers

zbMath Open stenstrom.perMaRDI QIDQ671449

List of research outcomes

Publication	Date of Publication	Type
Memory-Link Compression Schemes: A Value Locality Perspective	2018-06-12	Paper
Characterizing and Exploiting Small-Value Memory Instructions	2017-06-20	Paper
Dual-thread speculation: A simple approach to uncover thread-level parallelism on a simultaneous multithreaded processor	2008-07-30	Paper
https://portal.mardi4nfdi.de/entity/Q4790571	2003-02-04	Paper
https://portal.mardi4nfdi.de/entity/Q4536902	2002-11-06	Paper
https://portal.mardi4nfdi.de/entity/Q4537170	2002-11-06	Paper
Evaluation of compiler-controlled updating to reduce coherence-miss penalities in shared-memory multiprocessors	1999-10-14	Paper
Characterising and modelling shared memory accesses in multiprocessor programs	1997-02-27	Paper
Using write caches to improve performance of cache coherence protocols in shared-memory multiprocessors	1995-07-20	Paper
https://portal.mardi4nfdi.de/entity/Q4201892	1993-08-26	Paper

Research outcomes over time

Doctoral students

No records found.

Known relations from the MaRDI Knowledge Graph

Property	Value
MaRDI profile type	MaRDI person profile
instance of	human

This page was built for person: Per Stenström