Investigation of lifting-based hardware architectures for discrete wavelet transform

DOI10.1007/S00034-008-9068-1zbMath1162.94424OpenAlexW2028849018MaRDI QIDQ1024677

Saeed Sadri, Sayed Ahmad Salehi

Publication date: 17 June 2009

Published in: Circuits, Systems, and Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s00034-008-9068-1

zbMATH Keywords

lifting schemefield programmable gate arrayDWTblock-based scan method

Mathematics Subject Classification ID

Numerical methods for discrete and fast Fourier transforms (65T50) Analytic circuit theory (94C05)

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Cites Work

• Unnamed Item
• Factoring wavelet transforms into lifting steps
• Wavelet transforms that map integers to integers
• A survey on lifting-based discrete wavelet transform architectures
• A theory for multiresolution signal decomposition: the wavelet representation
• A note on "Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet Transform"
• Flipping Structure: An Efficient VLSI Architecture for Lifting-Based Discrete Wavelet Transform
• Analysis and VLSI architecture for 1-D and 2-D discrete wavelet transform
• Efficient Architectures for 1-D and 2-D Lifting-Based Wavelet Transforms

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