Word level bitwidth reduction for unbounded hardware model checking

DOI10.1007/s10703-009-0080-2zbMath1186.68279OpenAlexW2084006066MaRDI QIDQ1039855

Per Bjesse

Publication date: 23 November 2009

Published in: Formal Methods in System Design (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10703-009-0080-2

zbMATH Keywords

model checkingformal methodsstatic analysisword level

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60)

Related Items (1)

Level-up -- from bits to words

Cites Work

• The small model property: How small can it be?
• A Practical Approach to Word Level Model Checking of Industrial Netlists
• An improved equivalence algorithm
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